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HCA10008
Data Sheet August 1999 File Number
4772
80V/2.5A Peak, High Frequency Full Bridge FET Driver
The HCA10008 is a high frequency, medium voltage Full Bridge N-Channel FET driver IC, available in 20 lead plastic SOIC package. The HCA10008 can drive every possible switch combination except those which would cause a shoot through condition. The HCA10008 can switch at frequencies up to 1MHz and is well suited to driving Voice Coil Motors, high-frequency Class D audio amplifiers, and power supplies. For example, the HCA10008 can drive medium voltage brush motors, and two HCA10008s can be used to drive high performance stepper motors, since the short minimum "on-time" can provide fine micro-stepping capability. Short propagation delays of approximately 55ns maximizes control loop crossover frequencies and dead-times which can be adjusted to near zero to minimize distortion, resulting in rapid, precise control of the driven load.
Features
* Independently Drives 4 N-Channel FET in Half Bridge or Full Bridge Configurations * Bootstrap Supply Max Voltage to 95VDC * Drives 1000pF Load at 1MHz in Free Air at 50oC with Rise and Fall Times of Typically 10ns * User Programmable Dead Time * On-Chip Charge Pump and Bootstrap Upper Bias Supplies * DIS (Disable) Overrides Input Control * Input Logic Thresholds Compatible with 5V to 15V Logic Levels * Very Low Power Consumption * Undervoltage Protection
Applications
* Medium/Large Voice Coil Motors * Full Bridge Power Supplies
Ordering Information
PART NUMBER HCA10008 TEMP RANGE (oC) -40 to 85 PACKAGE 20 Ld SOIC (W) PKG. NO. M20.3
* Class D Audio Power Amplifiers * High Performance Motor Controls * Noise Cancellation Systems
Pinout
HCA10008 (SOIC) TOP VIEW
BHB BHI DIS VSS BLI ALI AHI HDEL LDEL 1 2 3 4 5 6 7 8 9 20 19 18 17 16 15 14 13 12 11 BHO BHS BLO BLS VDD VCC ALS ALO AHS AHO
* Battery Powered Vehicles * Peripherals * U.P.S. * Related Literature - AN9405 Application Note for the HIP4081A and the HCA10008
AHB 10
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999
HCA10008 Application Block Diagram
80V
12V BHO BHS BHI BLI HCA10008 ALI AHI ALO AHS AHO BLO LOAD
GND
GND
Functional Block Diagram (1/2 HCA10008)
AHB 10 UNDERVOLTAGE CHARGE PUMP LEVEL SHIFT AND LATCH DRIVER 11 AHS 12 TURN-ON DELAY DBS DIS 3 15 VCC TO VDD (PIN 16) AHO CBS HIGH VOLTAGE BUS 80VDC
VDD 16 AHI 7
DRIVER ALI 6 TURN-ON DELAY 13
ALO CBF
+12VDC BIAS SUPPLY
ALS 14 HDEL LDEL VSS 8 9 4
TRUTH TABLE INPUT ALI, BLI X 1 0 0 X AHI, BHI X X 1 0 X U/V X 0 0 0 1 DIS 1 0 0 0 X OUTPUT ALO, BLO 0 1 0 0 0 AHO, BHO 0 0 1 0 0
NOTE: X signifies that input can be either a "1" or "0".
2
HCA10008 Typical Application
(PWM Mode Switching)
80V
1 BHB 12V DIS PWM INPUT 2 BHI 3 DIS HCA10008 4 VSS 5 BLI 6 ALI 7 AHI 8 HDEL 9 LDEL 10 AHB
BHO 20 BHS 19 BLO 18 BLS 17 VDD 16 VCC 15 ALS 14 ALO 13 AHS 12 AHO 11 12V LOAD
GND TO OPTIONAL CURRENT CONTROLLER
+ 6V
GND
3
HCA10008 Pin Descriptions
PIN NUMBER 1 SYMBOL BHB DESCRIPTION B High-side Bootstrap supply. External bootstrap diode and capacitor are required. Connect cathode of bootstrap diode and positive side of bootstrap capacitor to this pin. Internal charge pump supplies 30A out of this pin to maintain bootstrap supply. Internal circuitry clamps the bootstrap supply to approximately 12.8V. B High-side Input. Logic level input that controls BHO driver (Pin 20). BLI (Pin 5) high level input overrides BHI high level input to prevent half-bridge shoot-through, see Truth Table. DIS (Pin 3) high level input overrides BHI high level input. The pin can be driven by signal levels of 0V to 15V (no greater than VDD). An internal 100A pull-up to VDD will hold BHI high, so no connection is required if high-side and low-side outputs are to be controlled by the low-side input. DISable input. Logic level input that when taken high sets all four outputs low. DIS high overrides all other inputs. When DIS is taken low the outputs are controlled by the other inputs. The pin can be driven by signal levels of 0V to 15V (no greater than VDD). An internal 100A pull-up to VDD will hold DIS high if this pin is not driven. Chip negative supply, generally will be ground. B Low-side Input. Logic level input that controls BLO driver (Pin 18). If BHI (Pin 2) is driven high or not connected externally then BLI controls both BLO and BHO drivers, with dead time set by delay currents at HDEL and LDEL (Pin 8 and 9). DIS (Pin 3) high level input overrides BLI high level input. The pin can be driven by signal levels of 0V to 15V (no greater than VDD). An internal 100A pull-up to VDD will hold BLI high if this pin is not driven. A Low-side Input. Logic level input that controls ALO driver (Pin 13). If AHI (Pin 7) is driven high or not connected externally then ALI controls both ALO and AHO drivers, with dead time set by delay currents at HDEL and LDEL (Pin 8 and 9). DIS (Pin 3) high level input overrides ALI high level input. The pin can be driven by signal levels of 0V to 15V (no greater than VDD). An internal 100A pull-up to VDD will hold ALI high if this pin is not driven. A High-side Input. Logic level input that controls AHO driver (Pin 11). ALI (Pin 6) high level input overrides AHI high level input to prevent half-bridge shoot-through, see Truth Table. DIS (Pin 3) high level input overrides AHI high level input. The pin can be driven by signal levels of 0V to 15V (no greater than VDD). An internal 100A pull-up to VDD will hold AHI high, so no connection is required if high-side and low-side outputs are to be controlled by the low-side input. High-side turn-on DELay. Connect resistor from this pin to VSS to set timing current that defines the turn-on delay of both high-side drivers. The low-side drivers turn-off with no adjustable delay, so the HDEL resistor guarantees no shoot-through by delaying the turn-on of the high-side drivers. HDEL reference voltage is approximately 5.1V. Low-side turn-on DELay. Connect resistor from this pin to VSS to set timing current that defines the turn-on delay of both low-side drivers. The high-side drivers turn-off with no adjustable delay, so the LDEL resistor guarantees no shoot-through by delaying the turn-on of the low-side drivers. LDEL reference voltage is approximately 5.1V. A High-side Bootstrap supply. External bootstrap diode and capacitor are required. Connect cathode of bootstrap diode and positive side of bootstrap capacitor to this pin. Internal charge pump supplies 30A out of this pin to maintain bootstrap supply. Internal circuitry clamps the bootstrap supply to approximately 12.8V. A High-side Output. Connect to gate of A High-side power MOSFET. A High-side Source connection. Connect to source of A High-side power MOSFET. Connect negative side of bootstrap capacitor to this pin. A Low-side Output. Connect to gate of A Low-side power MOSFET. A Low-side Source connection. Connect to source of A Low-side power MOSFET. Positive supply to gate drivers. Must be same potential as VDD (Pin 16). Connect to anodes of two bootstrap diodes. Positive supply to lower gate drivers. Must be same potential as VCC (Pin 15). Decouple this pin to VSS (Pin 4). B Low-side Source connection. Connect to source of B Low-side power MOSFET. B Low-side Output. Connect to gate of B Low-side power MOSFET. B High-side Source connection. Connect to source of B High-side power MOSFET. Connect negative side of bootstrap capacitor to this pin. B High-side Output. Connect to gate of B High-side power MOSFET.
2
BHI
3
DIS
4 5
VSS BLI
6
ALI
7
AHI
8
HDEL
9
LDEL
10
AHB
11 12 13 14 15 16 17 18 19 20
AHO AHS ALO ALS VCC VDD BLS BLO BHS BHO
4
HCA10008
Absolute Maximum Ratings
Supply Voltage, VDD and VCC . . . . . . . . . . . . . . . . . . . . -0.3V to 16V Logic I/O Voltages . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VDD +0.3V Voltage on AHS, BHS . . . -6.0V (Transient) to 80V (25oC to 125oC) Voltage on AHS, BHS . . .-6.0V (Transient) to 70V (-55oC to 125oC) Voltage on ALS, BLS . . . . . . . -2.0V (Transient) to +2.0V (Transient) Voltage on AHB, BHB . . . . . . VAHS, BHS -0.3V to VAHS, BHS +VDD Voltage on ALO, BLO. . . . . . . . . . . . .VALS, BLS -0.3V to VCC +0.3V Voltage on AHO, BHO . . . . . . VAHS, BHS -0.3V to VAHB, BHB +0.3V Input Current, HDEL and LDEL . . . . . . . . . . . . . . . . . . -5mA to 0mA Phase Slew Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20V/ns NOTE: All Voltages relative to VSS, unless otherwise specified.
Thermal Information
Thermal Resistance (Typical, Note 1) JA (oC/W) SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .125oC Maximum Lead Temperature (Soldering 10s)). . . . . . . . . . . . .300oC (SOIC - Lead Tips Only)
Operating Conditions
Supply Voltage, VDD and VCC . . . . . . . . . . . . . . . . . . +9.5V to +15V Voltage on ALS, BLS . . . . . . . . . . . . . . . . . . . . . . . . . -1.0V to +1.0V Voltage on AHB, BHB . . . . . . . .VAHS, BHS +5V to VAHS, BHS +15V Input Current, HDEL and LDEL . . . . . . . . . . . . . . . .-500A to -50A Ambient Temperature Range . . . . . . . . . . . . . . . . . . . -40oC to 85oC
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. JA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
VDD = VCC = VAHB = VBHB = 12V, VSS = VALS = VBLS = VAHS = VBHS = 0V, RHDEL = RLDEL = 100K and TA = 25oC, Unless Otherwise Specified TJ = 25oC TJS = -40oC TO 125oC MAX MIN MAX UNITS
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
SUPPLY CURRENTS AND CHARGE PUMPS VDD Quiescent Current VDD Operating Current VCC Quiescent Current VCC Operating Current AHB, BHB Quiescent Current Qpump Output Current AHB, BHB Operating Current AHS, BHS, AHB, BHB Leakage Current AHB-AHS, BHB-BHS Qpump Output Voltage IDD IDDO ICC ICCO IAHB, IBHB All inputs = 0V Outputs switching f = 500kHz All Inputs = 0V, IALO = IBLO = 0 f = 500kHz, No Load All Inputs = 0V, IAHO = IBHO = 0 VDD = VCC = VAHB = VBHB = 10V 8.5 9.5 1 -50 0.6 11.5 10.5 12.5 0.1 1.25 -30 1.2 0.02 12.6 14.5 15.5 10 2.0 -11 1.5 1.0 14.0 7.5 8.5 0.8 -60 0.5 10.5 14.5 15.5 20 3 -10 1.9 10 14.5 mA mA A mA A mA A V
IAHBO, IBHBO f = 500kHz, No Load IHLK VAHB-VAHS VBHB-VBHS VBHS = VAHS = 80V, VAHB = VBHB = 93V IAHB = IAHB = 0, No Load
INPUT PINS: ALI, BLI, AHI, BHI, AND DIS Low Level Input Voltage High Level Input Voltage Input Voltage Hysteresis Low Level Input Current High Level Input Current IIL IIH VIN = 0V, Full Operating Conditions VIN = 5V, Full Operating Conditions VIL VIH Full Operating Conditions Full Operating Conditions 2.5 -130 -1 35 -100 1.0 -75 +1 2.7 -135 -10 0.8 -65 +10 V V mV A A
TURN-ON DELAY PINS: LDEL AND HDEL LDEL, HDEL Voltage VHDEL, VLDEL IHDEL = ILDEL = -100A 4.9 5.1 5.3 4.8 5.4 V
5
HCA10008
Electrical Specifications
VDD = VCC = VAHB = VBHB = 12V, VSS = VALS = VBLS = VAHS = VBHS = 0V, RHDEL = RLDEL = 100K and TA = 25oC, Unless Otherwise Specified (Continued) TJ = 25oC PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX TJS = -40oC TO 125oC MIN MAX UNITS
GATE DRIVER OUTPUT PINS: ALO, BLO, AHO, AND BHO Low Level Output Voltage High Level Output Voltage Peak Pullup Current Peak Pulldown Current Undervoltage, Rising Threshold Undervoltage, Falling Threshold Undervoltage, Hysteresis VOL VCC-VOH IO+ IOUV+ UVHYS IOUT = 100mA IOUT = -100mA VOUT = 0V VOUT = 12V 0.7 0.8 1.7 1.7 8.1 7.6 0.25 0.85 0.95 2.6 2.4 8.8 8.3 0.4 1.0 1.1 3.8 3.3 9.4 8.9 0.65 0.5 0.5 1.4 1.3 8.0 7.5 0.2 1.1 1.2 4.1 3.6 9.5 9.0 0.7 V V A A V V V
Switching Specifications
VDD = VCC = VAHB = VBHB = 12V, VSS = VALS = VBLS = VAHS = VBHS = 0V, RHDEL = RLDEL = 10K, CL = 1000pF TJ = 25oC TJS = -40oC TO 125oC MAX 60 70 70 90 25 25 75 85 70 550 620 MIN 50 40 40 30 200 MAX 80 90 90 110 35 35 95 105 90 600 690 UNITS ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
PARAMETER Lower Turn-Off Propagation Delay (ALI-ALO, BLI-BLO) Upper Turn-Off Propagation Delay (AHI-AHO, BHI-BHO) Lower Turn-On Propagation Delay (ALI-ALO, BLI-BLO) Upper Turn-On Propagation Delay (AHI-AHO, BHI-BHO) Rise Time Fall Time Turn-On Input Pulse Width Turn-Off Input Pulse Width Turn-On Output Pulse Width Turn-Off Output Pulse Width Disable Turn-Off Propagation Delay (DIS - Lower Outputs) Disable Turn-Off Propagation Delay (DIS - Upper Outputs) Disable to Lower Turn-On Propagation Delay (DIS - ALO and BLO) Refresh Pulse Width (ALO and BLO) Disable to Upper Enable (DIS - AHO and BHO)
SYMBOL TLPHL THPHL TLPLH THPLH TR TF TPWIN-ON TPWIN-OFF TPWOUT-ON
TEST CONDITIONS
MIN -
TYP 30 35 45 60 10 10 45 55 40 410 450
RHDEL = RLDEL = 10K RHDEL = RLDEL = 10K
-
RHDEL = RLDEL = 10K RHDEL = RLDEL = 10K RHDEL = RLDEL = 10K
50 40 40 30 240 -
TPWOUT-OFF RHDEL = RLDEL = 10K TDISLOW TDISHIGH TDLPLH TREF-PW TUEN
6
HCA10008 Timing Diagrams
X = A OR B, A AND B HALVES OF BRIDGE CONTROLLER ARE INDEPENDENT TLPHL U/V = DIS = 0 THPHL
XLI
XHI
XLO
XHO
THPLH
TLPLH
TR (10% - 90%)
TF (10% - 90%)
FIGURE 1. INDEPENDENT MODE
U/V = DIS = 0
XLI
XHI = HI OR NOT CONNECTED
XLO
XHO
FIGURE 2. BISTATE MODE
TDLPLH U/V OR DIS TREF-PW
TDIS
XLI
XHI
XLO
XHO TUEN
FIGURE 3. DISABLE FUNCTION
7
HCA10008 Typical Performance Curves
VDD = VCC = VAHB = VBHB = 12V, VSS = VALS = VBLS = VAHS = VBHS = 0V, RHDEL = RLDEL = 100K and TA = 25oC, Unless Otherwise Specified
11.0 14.0 IDD SUPPLY CURRENT (mA) IDD SUPPLY CURRENT (mA) 10.5 10.0 9.5 9.0 8.5 8.0 6 8 10 12 VDD SUPPLY VOLTAGE (V) 14 0 100 200 300 400 500 600 700 800 900 1000 SWITCHING FREQUENCY (kHz) 12.0 10.0 8.0 6.0 4.0 2.0
FIGURE 4. QUIESCENT IDD SUPPLY CURRENT vs VDD SUPPLY VOLTAGE
FIGURE 5. IDDO, NO-LOAD IDD SUPPLY CURRENT vs FREQUENCY (kHz)
FLOATING SUPPLY BIAS CURRENT (mA)
30.0 25.0 20.0 15.0 10.0 5.0 0.0 0 100 200 300 400 500 600 700 800 900 1000 SWITCHING FREQUENCY (kHz) ICC SUPPLY CURRENT (mA)
5.0 125oC 4.0 75oC 25oC 3.0 0oC -40oC 2.0
1.0
0.0 0 100 200 300 400 500 600 700 800 900 1000 SWITCHING FREQUENCY (kHz)
FIGURE 6. SIDE A, B FLOATING SUPPLY BIAS CURRENT vs FREQUENCY (LOAD = 1000pF)
2.5 FLOATING SUPPLY BIAS CURRENT (mA)
FIGURE 7. ICCO, NO-LOAD ICC SUPPLY CURRENT vs FREQUENCY (kHz) TEMPERATURE
-90 LOW LEVEL INPUT CURRENT (A)
2
-100
1.5
1
-110
0.5
0
200
600 800 400 SWITCHING FREQUENCY (kHz)
1000
-120 -50
-25
0 25 50 75 JUNCTION TEMPERATURE (oC)
100
125
FIGURE 8. IAHB, IBHB, NO-LOAD FLOATING SUPPLY BIAS CURRENT vs FREQUENCY
FIGURE 9. ALI, BLI, AHI, BHI LOW LEVEL INPUT CURRENT IIL vs TEMPERATURE
8
HCA10008 Typical Performance Curves
15.0 NO-LOAD FLOATING CHARGE PUMP VOLTAGE (V)
VDD = VCC = VAHB = VBHB = 12V, VSS = VALS = VBLS = VAHS = VBHS = 0V, RHDEL = RLDEL = 10K and TA = 25oC, Unless Otherwise Specified
80
14.0
PROPAGATION DELAY (ns) -20 0 20 40 60 80 100 120
70
13.0
60
12.0
50
11.0
40
10.0 -40
30 -40
-20
JUNCTION TEMPERATURE (oC)
0 20 40 60 80 100 JUNCTION TEMPERATURE (oC)
120
FIGURE 10. AHB - AHS, BHB - BHS NO-LOAD CHARGE PUMP VOLTAGE vs TEMPERATURE
FIGURE 11. UPPER DISABLE TURN-OFF PROPAGATION DELAY TDISHIGH vs TEMPERATURE
80
525 PROPAGATION DELAY (ns)
PROPAGATION DELAY (ns) -25 0 25 50 75 100 125 150
500
70
60
475
50
450
40
425 -50
30 -40
-20
0
JUNCTION TEMPERATURE (oC)
20 40 60 80 JUNCTION TEMPERATURE (oC)
100
120
FIGURE 12. DISABLE TO UPPER ENABLE, TUEN, PROPAGATION DELAY vs TEMPERATURE
450
FIGURE 13. LOWER DISABLE TURN-OFF PROPAGATION DELAY TDISLOW vs TEMPERATURE
80 70 60 50 40 30
REFRESH PULSE WIDTH (ns)
425
400
375
350 -50
PROPAGATION DELAY (ns) -25 0 25 50 75 100 125 150
20 -40 -20 0 20 40 60 80 100 120 JUNCTION TEMPERATURE (oC)
JUNCTION TEMPERATURE (oC)
FIGURE 14. TREF-PW REFRESH PULSE WIDTH vs TEMPERATURE
FIGURE 15. DISABLE TO LOWER ENABLE TDLPLH PROPAGATION DELAY vs TEMPERATURE
9
HCA10008 Typical Performance Curves
VDD = VCC = VAHB = VBHB = 12V, VSS = VALS = VBLS = VAHS = VBHS = 0V, RHDEL = RLDEL = 10K and TA = 25oC, Unless Otherwise Specified (Continued)
80 70 60 50 40 30 20 -40 -20 0 20 40 60 80 100 JUNCTION TEMPERATURE (oC) 120 PROPAGATION DELAY (ns) 80 70 60 50 40 30 20 -40
PROPAGATION DELAY (ns)
-20
0 20 40 60 80 JUNCTION TEMPERATURE (oC)
100
120
FIGURE 16. UPPER TURN-OFF PROPAGATION DELAY THPHL vs TEMPERATURE
FIGURE 17. UPPER TURN-ON PROPAGATION DELAY THPLH vs TEMPERATURE
80 70 60 50 40 30 20 -40 -20 0 20 40 60 80 JUNCTION TEMPERATURE (oC) 100 120
80 70 60 50 40 30 20 -40 -20 0 20 40 60 80 100 JUNCTION TEMPERATURE (oC) 120
PROPAGATION DELAY (ns)
FIGURE 18. LOWER TURN-OFF PROPAGATION DELAY TLPHL vs TEMPERATURE
13.5
PROPAGATION DELAY (ns) TURN-ON RISE TIME (ns)
FIGURE 19. LOWER TURN-ON PROPAGATION DELAY TLPLH vs TEMPERATURE
13.5
GATE DRIVE FALL TIME (ns)
12.5
12.5
11.5
11.5
10.5
10.5
9.5
9.5
8.5 -40
-20
0 20 40 60 80 100 JUNCTION TEMPERATURE (oC)
120
8.5 -40
-20
0 20 40 60 80 100 JUNCTION TEMPERATURE (oC)
120
FIGURE 20. GATE DRIVE FALL TIME TF vs TEMPERATURE
FIGURE 21. GATE DRIVE RISE TIME TR vs TEMPERATURE
10
HCA10008 Typical Performance Curves
6.0 HDEL, LDEL INPUT VOLTAGE (V)
VDD = VCC = VAHB = VBHB = 12V, VSS = VALS = VBLS = VAHS = VBHS = 0V, RHDEL = RLDEL = 100K and TA = 25oC, Unless Otherwise Specified
1500 1250
5.5 VCC - VOH (mV) 1000 750 500 250 4.0 -40 0 10
5.0
-40oC 0oC 25oC 75oC 125oC 12 BIAS SUPPLY VOLTAGE (V) 14
4.5
-20
0 20 40 60 80 100 JUNCTION TEMPERATURE (oC)
120
FIGURE 22. VLDEL, VHDEL VOLTAGE vs TEMPERATURE
FIGURE 23. HIGH LEVEL OUTPUT VOLTAGE VCC - VOH vs BIAS SUPPLY AND TEMPERATURE AT 100mA
3.5 GATE DRIVE SINK CURRENT (A) 3.0 2.5 2.0 1.5 1.0 0.5 0.0
1500 1250 1000 VOL (mV) 750 -40oC 500 250 0 10 0oC 25oC 75oC 125oC 12 14 BIAS SUPPLY VOLTAGE (V)
6
7
8
9 10 11 12 13 VDD , VCC, VAHB , VBHB (V)
14
15
16
FIGURE 24. LOW LEVEL OUTPUT VOLTAGE VOL vs BIAS SUPPLY AND TEMPERATURE AT 100mA
3.5
FIGURE 25. PEAK PULLDOWN CURRENT IO vs BIAS SUPPLY VOLTAGE
500 LOW VOLTAGE BIAS CURRENT (mA) 200 100 50 20 10 5 2 1 0.5 0.2 0.1 1 2 5 10 20 50 100 200 500 1000 SWITCHING FREQUENCY (kHz) 10,000pF 3,000pF 1,000pF 100pF
GATE DRIVE SINK CURRENT (A)
3.0 2.5 2.0 1.5 1.0 0.5 0.0 6 7 8 9 10 11 12 13 14 15 16 VDD, VCC, VAHB, VBHB (V)
FIGURE 26. PEAK PULLUP CURRENT IO+ vs BIAS SUPPLY VOLTAGE
FIGURE 27. LOW VOLTAGE BIAS CURRENT IDD (LESS QUIESCENT COMPONENT) vs FREQUENCY AND GATE LOAD CAPACITANCE
11
HCA10008 Typical Performance Curves
VDD = VCC = VAHB = VBHB = 12V, VSS = VALS = VBLS = VAHS = VBHS = 0V, RHDEL = RLDEL = 100K and TA = 25oC, Unless Otherwise Specified (Continued)
1000 BIAS SUPPLY VOLTAGE, VDD (V) LEVEL-SHIFT CURRENT (A) 500 9.0 UV+ 8.8
200 100 50
8.6
UV8.4
20 10 10 20 50 100 200 500 1000 SWITCHING FREQUENCY (kHz)
8.2 50 25 0 25 50 75 100 125 150 TEMPERATURE (oC)
FIGURE 28. HIGH VOLTAGE LEVEL-SHIFT CURRENT vs FREQUENCY AND BUS VOLTAGE
FIGURE 29. UNDERVOLTAGE LOCKOUT vs TEMPERATURE
150
120 DEAD-TIME (ns)
90
60
30
0
10
50
100 150 200 HDEL/LDEL RESISTANCE (k)
250
FIGURE 30. MINIMUM DEAD-TIME vs DEL RESISTANCE
12
HCA10008 Small Outline Plastic Packages (SOIC)
N INDEX AREA E -B1 2 3 SEATING PLANE -AD -CA h x 45o H 0.25(0.010) M BM
M20.3 (JEDEC MS-013-AC ISSUE C) 20 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
INCHES SYMBOL A
L
MILLIMETERS MIN 2.35 0.10 0.33 0.23 12.60 7.40 MAX 2.65 0.30 0.51 0.32 13.00 7.60 NOTES 9 3 4 5 6 7 8o Rev. 0 12/93
MIN 0.0926 0.0040 0.013 0.0091 0.4961 0.2914
MAX 0.1043 0.0118 0.0200 0.0125 0.5118 0.2992
A1 B C D E
A1 0.10(0.004) C
e H h L N
0.050 BSC 0.394 0.010 0.016 20 0o 8o 0.419 0.029 0.050
1.27 BSC 10.00 0.25 0.40 20 0o 10.65 0.75 1.27
e
B 0.25(0.010) M C AM BS
NOTES: 1. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension "E" does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width "B", as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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Sales Office Headquarters
NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029
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